Low Power Adaptive FIR Filter Based on Distributed Arithmetic

This paper aims at implementation of a low power adaptive FIR filter based on distributed arithmetic (DA) with low power, high throughput, and low area. Least Mean Square (LMS) Algorithm is used to update the weight and decrease the mean square error between the current filter output and the desired response. The pipelined Distributed Arithmetic table reduces switching activity and hence it reduces power. The power consumption is reduced by keeping bit-clock used in carry-save accumulation much faster than clock of rest of the operations. We have implemented it in Quartus II and found that there is a reduction in the total power and the core dynamic power by 31.31% and 100.24% respectively when compared with the architecture without DA table.